Fundamental Analog Circuits Research
(Thrust leader: Pavan Hanumolu, U. of Illinois Urbana-Champaign)
The research in this thrust focuses on cross-cutting areas in analog and mixed-signal circuits, which impact all TxACE application areas (Energy Efficiency, Public Safety, Security, and Health Care). The research includes the design of various analog-to-digital converters, communication links, low-power crystal oscillators, on-chip frequency references, I/O circuits, noise reduction techniques, new amplifier topologies suitable for use in nano-scale CMOS, development of CAD tools for automatic design, layout generation, and testing of integrated circuits.
(Left) Noise-shaping SAR ADC (M. Flynn, University of Michigan). (Left middle) aging-compensated RC-based frequency reference (P. Hanumolu, University of Illinois Urbana-Champaign). (Top, right middle) DNN-based exploration engine used in layout-aware analog synthesis (D. Pan, University of Texas, Austin). (Top, right) multi-carrier DAC-based transmitter (S. Palermo, Texas A&M University). (Bottom, right middle) Placement and routing for an 8-bit split DAC (S. Sapatnekar, University of Minnesota). (Bottom, right) bi-directional PA-LNA (H. Wang, National Taiwan University).
Fundamental Analog Thrust
| Category | Accomplishment |
|---|---|
| Fundamental Analog (Circuits) | A new hybrid ADC architecture combines a voltage-controlled oscillator (VCO)-based continuous-time delta-sigma modulator (DSM) with a noise-shaping successive approximation register (SAR) quantizer. The key innovation is an anti-aliasing filter (AAF) that connects the VCO front-end with the NS-SAR quantizer, allowing direct sampling of time-domain information as voltage-domain information. A 28-nm CMOS prototype achieves an 84.2-dB signal-to-noise-distortion ratio and an 86.8-dB dynamic range within a 1-MHz bandwidth while consuming 1.62mW at 100MS/s. The Schreier SNDR figure of merit is 172.1 dB. (2810.033, M. Flynn, University of Michigan) |
| Fundamental Analog (Circuits) | The first temperature- and aging-compensated RC Oscillator (TACO) maintains long-term stability by periodically synchronizing its frequency with a less-aged reference oscillator. To enhance its stability, TACO incorporates resistors with higher activation energy (Ea), employs switched dual RC branches to reduce stress induced by DC currents, and applies duty cycling to slow down the aging of the reference oscillator. A prototype 100-MHz oscillator built using a 65-nm CMOS process achieves an inaccuracy of ±1030 ppm over a wide temperature range (-40°C to 85°C) after 500 hours of accelerated aging at 125°C. (2810.036, P. Hanumolu, University of Illinois Urbana-Champaign) |
| Fundamental Analog (Circuits) | A new 50Gb/s multi-carrier transmitter (TX) has been developed, utilizing carrier orthogonality to allow band overlap. It features three 5GS/s bands with BB PAM4, MB, and HB 16-state complex modulation on carriers at 5 and 10GHz. The TX, fabricated in a 22-nm FinFET process, operates at 50Gb/s by activating these three bands simultaneously. The system’s performance, evaluated through histogram and constellation results obtained via an oscilloscope measurements, demonstrates BER<10-4 over a channel with 5-dB loss at 12.5GHz, thanks to TX FIR equalization and 4-tap ICI cancellation. (2810.062, S. Palermo, Texas A&M University) |
